Gated truncated readout system

ABSTRACT

A gated truncated readout system for position sensitive or imaging detectors that improves resolution over traditional readout systems. The readout system includes two or more amplifiers that receive a multichannel output analog data from the detector. Analog gates control circuitry, included in the readout circuit, receives the signals from the amplifiers, determines a fractional value of the sum-integral of the signals, and enables analog gates operation around an area of interest, disabling all other channels where noise dominates the signal value and thereby improving interpolation accuracy of the signals centroid position and the detector resolution. Filtered signals are transmitted to a centroid interpolation signal processing device for computation of the centroid position. As a result disabling all channels where noise dominates the signal value, the gated truncated readout system provides better accuracy improved detector resolution.

The United States Government may have certain rights to this invention under Management and Operating Contract No. DE-AC05-06OR23177 from the Department of Energy.

FIELD OF THE INVENTION

The present invention relates to readout systems for position sensitive detectors including radiation imaging detectors or 2-D position sensitive detectors and, more specifically, relates to multichannel analog data readout systems where it is important to filter-reject any part of the data which include more noise than signal in order to provide improved resolution accuracy and lead to better image or position contrast.

BACKGROUND

A large variety of position sensitive detectors (PSDs) are available commercially, such as multi-anode or position sensitive photomultipliers (PS-PMT's), PMTs array, and semiconductor sensors array or multi-output position sensitive solid state detectors Many of above mentioned detectors are used with a specific interpolation algorithm for finding the centroid from many inputs of acquired analog data.

With reference to FIG. 1, a conventional one-dimensional centroid position-finding algorithm or “center-of-gravity” (COG) computation may include the following formula:

$\begin{matrix} {{X = \frac{\sum\limits_{i}{i \cdot X_{i}}}{\sum X_{i}}},1} & (1) \end{matrix}$

where “X” is interpolated centroid position, “Xi” is a signal amplitude acquired from channel i, “i” is a number of the signal channel which may have a value from 1 to “n”, and “n” is the number of the last readout channel.

Using the center-of-gravity algorithm in equation (1), most of the useful data can be seen in the area of interest and all other outputs generate mostly noise. However, executing the algorithm causes the noise from remote outputs to get larger weighting coefficients which unfortunately “pull” the COG position out of its real location, degrading the accuracy of the COG determination.

An example of the deleterious effect on a center-of-gravity determination as a result of thermal noise can be seen in FIGS. 2A and 2B. In FIG. 2A, the useful output is on the left side of the X-axis and the outputs on the right side of the X-axis generate mostly noise. However, the noise improperly gets a larger weighting coefficient and thus pulls the determined COG position out of its real location, creating a false COG determination to the right of the actual position.

FIG. 2B depicts the same deleterious effect on a center-of-gravity determination as a result of thermal noise, but with the useful output on the right side of the X-axis and the outputs on the left side of the X-axis generating mostly noise. In this case, the noise improperly pulls the determined COG position to the left side of its real location.

Accordingly, there is a need to reduce or eliminate the errors inherent in conventional COG determinations and thus improve the position resolution enhancement of detectors and other position-detecting devices.

OBJECTS AND ADVANTAGES OF THE INVENTION

The object of the present invention is to provide an improved readout system for position sensitive detectors including radiation imaging detectors or 2-D position sensitive detectors.

A further objective is to reduce or eliminate the errors inherent in conventional COG determinations and thus improve the position resolution enhancement of detectors and other position-detecting devices.

These and other objects and advantages of the present invention will be understood by reading the following description along with reference to the drawings.

SUMMARY OF THE INVENTION

The present invention is a gated truncated readout system for position sensitive or imaging detectors that improves resolution over traditional readout systems. The readout system includes two or more amplifiers that receive a multichannel output analog data from the detector. Analog gates control circuitry, included in the readout circuit, receives the signals from the amplifiers, determines a fractional value of the sum-integral of the signals, and enables analog gates operation around an area of interest, disabling all other channels where noise dominates the signal value and thereby improving interpolation accuracy of the signals centroid position and the detector resolution. Filtered signals are transmitted to a centroid interpolation signal processing device for computation of the centroid position. As a result disabling all channels where noise dominates the signal value, the gated truncated readout system provides better accuracy improved detector resolution.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING(S)

Reference is made herein to the accompanying drawings, which are not necessarily drawn to scale, and wherein:

FIG. 1 depicts a position sensitive detector with “n” analog data outputs. In the event most of data appeared in the “area of interest”, while most of the other inputs generate mostly noise.

FIG. 2A depicts the deleterious effect on a center-of-gravity determination as a result of thermal noise. The useful output is on the left side of the X-axis and the outputs on the right side of the X-axis generate mostly noise. However, the noise improperly gets a larger weighting coefficient and thus pulls the determined COG position out of its real location, creating a false COG determination.

FIG. 2B depicts the same deleterious effect on a center-of-gravity determination as a result of thermal noise, but with the useful output on the right side of the X-axis and the outputs on the left side of the X-axis generating mostly noise. In this case, the noise improperly pulls the determined COG position to the left side of its real location.

FIG. 3 is a block diagram of analog truncated COG circuit with analog gates controlled from a summing amplifier with the control logic circuit.

FIG. 4A is a flood image with of a one coordinate projection obtained with a gamma camera irradiated with a gamma source, connected to the gated truncated readout system, and with the gating function turned off.

FIG. 4B is a flood image with of a one coordinate projection obtained with a gamma camera irradiated with a gamma source, connected to the gated truncated readout system, and with the gating function turned on. The resolution improvement is mostly visible on the left side of the histogram.

FIG. 5 is a block diagram of a second embodiment of a gated truncated readout system according to the invention.

DETAILED DESCRIPTION

The present invention relates to readout systems for position sensitive detectors including radiation imaging detectors or 2-D position sensitive detectors. More specifically, it relates to multichannel analog data readout systems where it is important to filter or reject the part of the data which include more noise than signal. Filtering or rejecting the noise provides improved resolution accuracy, expands the sensitive area, and leads to better image or position contrast. It is applicable to a large variety of position sensitive detectors, such as multi-anode or position sensitive photomultipliers (PS-PMT's), PMT arrays, semiconductor sensor arrays, and multi-output position sensitive solid state detectors.

The current invention proposes sorting or filtering signals acquired from the outputs of the detectors. It includes a sum of signals approach in which zero is assigned to all amplitudes below a specific fraction of the sum of all signals. In the case where all of the detectors' outputs are connected directly to a multichannel Data Acquisition System (DAQ), this approach could be easily applied within a software data processing algorithm. In those situations in which an analog signal processing circuit is used prior to final DAQ, the filtering procedure is preferably done on the hardware level where a biased signal from the analog sum output data readout amplifiers provides a noise rejection feature improving the COG determination accuracy.

The current invention provides a gated truncated readout system circuit rejecting the noise through the use of analog gates-valves, also known as analog switches, instead of amplifier biasing. Amplitude comparators are used to control the analog gates, opening only those gates where the amplitude is above a specific fraction of the total sum of all signals. The circuit thus provides a more accurate analog amplitude filter using a “fraction of sum rejection filter approach”. The circuit will work with input signals of any polarity, and has a better linearity for small amplitudes.

The proposed analog readout signal processing circuit considers use of all amplifiers in a linear mode while a truncated COG algorithm is performed using analog gates or switches which are controlled from summing amplifiers along with a logic circuit. The proposed circuit has no initial nonlinearity due to amplifier bias and doesn't change shape or amplitude signals inside the area of interest.

With reference to FIG. 3, a device or detector 1 with n analog outputs, hereinafter referred to as a detector 1, is a position sensitive detector with analog outputs. The analog outputs carry the detected event position information and a center of gravity algorithm is applied for precision interpolation. An optional input amplifier 2 provides amplification and conditioning of the output signals from the detector 1. In the analog readout signal processing circuit the input amplifier 2 outputs are split, with one output connected to a summing amplifier 4, which provides a sum of all output signals. The input amplifier 2 is also connected to a Low Pulse Filter (LPF) that provides a set of analog signal delay amplifiers. The LPF provides a delay to all detector signals before a gate logic signal will be developed, from which the output is sent to an −array of n analog delay amplifiers 3. The summing amplifier 4 provides an analog sum of all signals coming from device 1 The analog sum is then sent to an optional stretcher amplifier 5, which functions is to keep the sum constant during operation of the event logic analog circuit. The stretcher amplifier circuit 5 stretches the output of the sum amplifier for a period of time to enable gate logic signal processing operation with analog delay capability.

The summing amplifier 4 is further connected to a discriminator circuit 6 which discriminates event signals from noise and provides a system control pulse or analog gate enable on the trigger 9. The discriminator circuit 6 provides an amplitude discriminator signal which serves as an event recognition device. The discriminator circuit 6 provides an electronic trigger when the sum amplifier output is above the desired threshold amplitude.

A fraction of sum signal from the optional pulse stretcher 5 is passed to a fraction adjustment divider 7 which is connected to n analog comparators 8, one per each n post amplifier 3. If any of the n post amplifier 3 outputs is above the selected threshold n of the fraction adjustment divider 7 output, it will turn on trigger 9 and open the linear gate/switch 10 to pass the signal through. All signals below the selected threshold will be blocked. The discriminator 6 output pulse also provides an acquisition window. At the end of one event acquisition cycle, R/Enable is set to “off”, which resets all triggers thereby closing all open linear gates.

The noise rejection threshold adjustment 7, which is preferably a potentiometer or a dedicated circuit, provides analog threshold data for the gate logic fast analog comparators 8. The meaning of the term “fast comparator” as used herein is a comparator with a low delay time, wherein the meaning of the term “low delay time” is a delay time of less than 100 ns. The fast analog comparators 8, one corresponding to each channel, function to change the output if the channel amplitude is above the noise rejection signal.

The trigger circuit 9 is a two stage electronic circuit which changes the output state for a particular channel if that channel is triggered from the comparator. All triggers are reset at the end of gate logic process prior the next event. The linear gate/switch 10 is an electronic linear/analog switch which provides gating of a specific detector's outputs if permitted by the event gate logic, such as if the current channel amplitude is above the noise rejection threshold. The discriminator output 11 optionally provides an event acquisition time window and could be used for an external Data Acquisition system (DAQ), such as a multichannel ADC device or multichannel DAQ or with a preliminary analog COG weighting circuit.

All analog outputs after applying the gate logic algorithm could be processed directly with the external multichannel DAQ device. Additionally, an advantage could be achieved with an advanced technique for analog signal processing, such as the one proposed in “Analog Readout System with Charge Division Type Output” V. Popov; S. Majewski; A. G. Weisenberger; R. Wojcik, 2001 IEEE Nuclear Science Symposium Conference Record (Cat. No. 01CH37310), which is incorporated herein in its entirety. Adding a next stage of analog signal processing can significantly reduce a number of DAQ connection lines without loss of interpolation accuracy.

The gated truncated readout approach of the present invention eliminates introduction of nonlinear gain or partial amplitude cutting of area of interest pulses. Linear gates or switches controlled with the event logic circuit provide clean filtering/rejection of noise data coming from all inputs where amplitude is below a selected fraction of the sum.

A one event data processing formula according to the invention is:

A _(i)=0 if X _(i) ·G<F·Sum; else A=X _(i) ·G ₀ ·G ₁,  (3)

where: Sum=ΣX_(i)·G₀, G₀ is the gain factor of 2 amplifiers, G₁ is the gain factor of 3 amplifiers, F—is a selected fraction or Sum, i is the channel index, from 1 to n, where n is the total number of detector device 1 output channels.

Example

An exemplary gated truncated readout system was evaluated with a small gamma camera made of a 4×4 array of R59000008 Hamamatsu photomultiplier tubes coupled to a NaI(Tl) pixelated crystal array. The R59000008 PSPMT is a crosswire anode layout type which is designed for use in the X and Y projection 2D readout configuration. So the camera has a set of two 16X and 16Y outputs.

Referring to FIGS. 4A and 4B, there are shown flood images of an acquired one coordinate projection with, as in FIG. 4A the gating function off, and, as in FIG. 4B with the gating function on. The flood images of the one coordinate projection are obtained with the gamma camera irradiated with a gamma source and connected to a gated truncated readout system according to the invention. The resolution improvement is most substantially visible on the left side of FIG. 4B as compared with the left side of FIG. 4A. The readout studies indicate a clear improvement in position resolution enhancement.

With reference to FIG. 5, a second embodiment of a gated truncated readout system according to the invention includes a position sensitive detector 20 with n analog outputs, a set of n interface-preamplifiers 22, optionally a set of n delays or delay amplifiers 24, and a set of n analog switches or gates 26 each including a control input, and an analog sum output 28. An analog signal proportional to the linear sum of all n amplitudes is provided to an event logic discriminator 30 and to analog switches logic 32. The analog switches logic 32 creates n control signals according to a fraction of the sum signal. The n control signals provide rejection of unwanted low signals and linear passing of signals important for COG determination.

After the set of n analog switches or gates 26 there are n gated analog outputs where noise channels are rejected proportionally to the sum signal, and they could be connected to any external DAQ for COG calculation or can be processed with any analog COG weighting circuit for reducing the number of analog outputs.

The proposed circuit is applicable to a wide range of radiation imaging devices, but, most applicably, to the SiPM or MPPC arrays which are a subject of temperature-dependent random noise. The temperature related noise is a serious problem for large scale sensors. A gated truncated readout system as described herein could be utilized in arrays with high gain uniformity, such as with SiPM or MPPC arrays, and coupled with low input offset comparator integrated circuits in order to improve their position resolution enhancement.

The description of the present invention has been presented for purposes of illustration and description, but is not intended to be exhaustive or limited to the invention in the form disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the invention. The embodiment was chosen and described in order to best explain the principles of the invention and the practical application, and to enable others of ordinary skill in the art to understand the invention for various embodiments with various modifications as are suited to the particular use contemplated. 

What is claimed is:
 1. A gated truncated readout system comprising: one or more amplifiers connected to a multichannel output device; one or more linear gates; a summing amplifier including an event logic and gates control circuit; controlling said one or more linear gates with input from said event logic and gates control circuit; a truncated center of gravity (COG) algorithm including a selectable fraction of the sum for filtering and discriminating signals from the logic and gates control circuit; setting a selected fraction of the sum for limiting system output signals; closing the linear gates to reject the signals having a sum below the selected fraction of the sum; and opening the linear gates to provide a gated truncated readout limited to the signals having an amplitude over the selected fraction of the sum.
 2. The gated truncated readout system of claim 1 comprising connecting the system output to a multichannel data acquisition (DAQ) system.
 3. The gated truncated readout system of claim 1 comprising: connecting the system output to an analog COG circuit to reduce amount of outputs; and connecting the output of the analog COG circuit to a multichannel data acquisition (DAQ) system. 